Services - SI Analysis

Increasing operating frequency and fast edge rates demands SI analysis on every designs .Caliber’s engineers having expertise in using simulation tools to analyze the various factors which affects board performance like ringing, crosstalk, overshoot and undershoot detects the problems in the earlier stages and provide time and cost saving in addition to board performance.

Pre-layout analysis: To determine good stack-up and the effectiveness of critical component placement, critical signal paths and routing parameters.

Post layout analysis: To solve potential SI issues by changing the routing, termination schemes, optimized termination values and IO buffer selection.

for boards

Preroute Analysis to determine the effectiveness of critical component placement, critical signal paths, stackup and routing parameters.

Post layout analysis to solve potential SI issues by changing the routing, termination schemes, optimized termination values and IO buffer selection.

Signal Integrity and Cross talk Analysis

Reflection, Ringing, Overshoot/Undershoot, Multiple threshold crossing
Forward and Backward Crosstalk
Eye Diagram Analysis

Power Integrity Analysis

SSN analysis
Power distribution system analysis
De-coupling Capacitors Estimation

EMI/EMC Analysis

Study of EMI on board and Rectification
EMC on FCC, CISPR, VCCI

Thermal Analysis

Hot Spot Analysis, Heat conduction, convention & radiation analysis, Finite volume, Finite element, Finite difference methods

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for chip packages

Reflection and Ringing Analysis
Propagation delay variations (skew)
Single/differential Crosstalk Analysis
EMI Analysis
Single-ended I/O supply noise (SSN)
Core Supply Noise & Analysis
De-coupling Capacitors Estimation

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modeling (electrical & thermal)

Parasitic RLC Extraction
BIS and S-parameter Model
Thermal Analysis-Theta Ja, Jb and Jc
Thermal Model and Nodal Temperature

We have expertise in Chip to Package to board level simulations supported by in-house IBIS model development expertise.

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